To date, higher integration of memory has progressed by downscaling to reduce the memory cell size. A conventional memory device includes a storage element that stores data, a program/read unit that selects the storage element, programs data, and reads the data, and an interconnect that transmits the data to the storage element; and these are made for each memory cell. Therefore, it is necessary to perform the downscaling of all of the components of the memory cell recited above to increase the memory cell integration; and there has been a limitation on increasing the integration. On the other hand, shift register memory devices have been proposed in which only the storage elements are disposed with high density and the data is shifted through the storage element column to transfer the data to a program/read unit provided in a separate location. However, while it is practically necessary to store not less than 100 positions of data in one storage element column in such a case, unfortunately, it has been exceedingly difficult to synchronously move 100 or more positions of data accurately.